Usage

First edit your alire.toml file and add the following elements:

• Add light_stm32g0xx in the dependency list:

  [[depends-on]]
  light_stm32g0xx = "*"
  

• if applicable, apply any runtime configuration variables (see below).

Then edit your project file to add the following elements:

• “with” the run-time project file. With this, gprbuild will compile the run-time before your application

  with "runtime_build.gpr";
  

• Specify the Target and Runtime attributes:

     for Target use runtime_build'Target;
     for Runtime ("Ada") use runtime_build'Runtime ("Ada");
  

• specify the Linker switches:

  package Linker is
    for Switches ("Ada") use Runtime_Build.Linker_Switches;
  end Linker;
  

The runtime is configurable via Alire crate configuration variables. See the project website for full details of the available options.

By default, the runtime is configured for the STM32G0B1RE. If your board has a different MCU, then you will need to specify which MCU you are using via the crate configuration. For example, to configure the runtime for the STM32G031J4, add the following to your alire.toml:

[configuration.values]
light_stm32g0xx.MCU_Sub_Family        = "G031"
light_stm32g0xx.MCU_Flash_Memory_Size = "4"

By default, the runtime configures the clock tree for a 64 MHz system clock from the high-speed internal (HSI) oscillator. If you want a different clock configuration, then use the crate configuration variables to specify the configuration you wish to use. For example, to configure the runtime to generate a 64 MHz system clock from a 24 MHz HSE crystal oscillator:

[configuration.values]
# Configure a 24 MHz HSE crystal oscillator
light_tasking_stm32g0xx.HSE_Clock_Frequency = 24000000
light_tasking_stm32g0xx.HSE_Bypass = false

# Select PLLRCLK as the SYSCLK source
light_tasking_stm32g0xx.SYSCLK_Src = "PLLRCLK"

# Configure the PLL VCO to run at 128 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M))
light_tasking_stm32g0xx.PLL_Src = "HSE"
light_tasking_stm32g0xx.PLL_N_Mul = 10
light_tasking_stm32g0xx.PLL_M_Div = 2

# Configure the PLLRCLK to run at 64 MHz from the 128 MHz VCO.
light_tasking_stm32g0xx.PLL_R_Div = 2

# Configure the AHB an APB to also run at 64 MHz
light_tasking_stm32g0xx.AHB_Pre = "DIV1"
light_tasking_stm32g0xx.APB_Pre = "DIV1"

The runtime will generate a compile time error when an invalid PLL configuration is set.

By default the PLL’s Q and P clocks are enabled. If you don’t need them, then you can disable them via the crate configuration:

[configuration.values]
light_stm32g0xx.PLL_Q_Enable = false
light_stm32g0xx.PLL_P_Enable = false

The runtime will enable the PLL only when either PLL_Q_Enable or PLL_P_Enable is true, or when SYSCLK_Src = "PLLRCLK".

The interrupt stack sizes are also configurable:

[configuration.values]
light_stm32g0xx.Interrupt_Stack_Size = 1024
light_stm32g0xx.Interrupt_Secondary_Stack_Size = 128